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sigilOS Retro: PC-88 and Sharp X68000 — Japan's Home Computer Era

June 22, 2026 · sigil-retropie · Sigil-Docs
retropie pc-88 x68000 z80 m68k

The Japanese home computer market of the 1980s was its own ecosystem — sharper graphics, richer sound, and a software library that rarely left the archipelago. Two of those machines are now launchable in the sigilOS RetroPie layer: the NEC PC-88 and the Sharp X68000. Both were already in the repo as bus skeletons; both landed as fully launchable cores in today's session. The launchable count holds at 40 — a launcher de-duplication fix landed alongside these cores correcting a stale slot.


System #40 — NEC PC-8800 (PC-88)

The PC-88 series dominated the Japanese home computer market from 1981 through the late 1980s. Its CPU is the Z80A at 4 MHz — the same Z80 variant that powered the MSX, ZX Spectrum, and CP/M machines of the era. sigilOS already has a Z80 core from the MSX and Master System implementations; the PC-88 core in cores/pc88.sg uses it directly.

The framebuffer: 3-plane 640×200

The PC-88's graphics mode is its defining characteristic: a three-plane 640×200 framebuffer. Each pixel is represented by one bit in each of three planes — R, G, and B — stored at separate base addresses in video RAM. To decode a pixel, the emulator reads the corresponding bit from each plane and combines them:

r = (plane_r[byte] >> bit) & 1
g = (plane_g[byte] >> bit) & 1
b = (plane_b[byte] >> bit) & 1
argb = 0xFF000000 | (r * 0xFF << 16) | (g * 0xFF << 8) | (b * 0xFF)

This gives 8 colors (the 3-bit RGB combinations). The decode runs per-pixel across all 640×200 = 128,000 positions into a standard ARGB32 framebuffer for the compositor. No palette table needed — the 8 colors are fully determined by the 3 bit values.

The bus

RegionAddressSize
ROM (BIOS/BASIC)0x000032 KB
RAM0x800032 KB
VRAM — plane Rvideo base8 KB each
VRAM — plane Gvideo base + 0x20008 KB
VRAM — plane Bvideo base + 0x40008 KB
I/O port $30Display mode + memory bank control

What's wired


Sharp X68000

The Sharp X68000, launched in 1987, was a home computer aimed squarely at arcade-quality gaming. Its CPU is the Motorola MC68000 at 10 MHz — the same processor as CPS-1, CPS-2, and the original Macintosh. But where those systems drove it with specialized arcade or desktop hardware, the X68000 gave it a sophisticated graphics chip (the CRTC + GVRAM) capable of modes that weren't common on home computers until years later.

GVRAM: 4bpp with indexed palette

The X68000's primary graphics mode uses a 4-bit-per-pixel indexed framebuffer (GVRAM) at 512×512 logical resolution, typically displayed as 512×256 or 256×256. Each byte of GVRAM encodes two pixels: the high nibble is the left pixel's palette index (0–15), the low nibble is the right pixel's. A 16-entry palette in the CRTC register block stores the RGB555 color for each index:

for each byte in gvram:
    left_idx  = (byte >> 4) & 0xF
    right_idx = byte & 0xF
    left_rgb  = palette[left_idx]    # RGB555
    right_rgb = palette[right_idx]

RGB555 to ARGB32 conversion: R = bits 10–14 (× 8), G = bits 5–9 (× 8), B = bits 0–4 (× 8). The × 8 scaling maps 5-bit [0..31] into 8-bit [0..248] — close enough for display without fractional math.

The bus

RegionAddressSize
ROM (BIOS/IOCS)0x0000001 MB
RAM0x0800002 MB
GVRAM0xC00000512 KB
CRTC palette0xE8220032 bytes (16 × RGB555)
I/O (DMAC/MFP/OPM)0xE80000+mapped stubs

What's wired


Comparing the two

PC-88X68000
CPUZ80A @ 4 MHzMC68000 @ 10 MHz
Resolution640×200512×256 (typical)
Color depth3-plane RGB (8 colors)4bpp indexed (16 colors, 65536-color palette space)
Graphics modePlanar bitfieldPacked nibble + palette lookup
Era1981–late 1980s1987–mid 1990s
Known forRPGs, strategy games, early Japanese PC gamingArcade ports, Gradius, Castlevania

Both use CPUs already present in the sigilOS RetroPie layer — the Z80 (MSX, SMS, Game Boy) and the 68000 (CPS-1, CPS-2, CPS-3, MegaDrive). The new work in both cores is the graphics decode: the PC-88's 3-plane bitfield and the X68000's 4bpp nibble-plus-palette. Neither required changes to the existing CPU implementations.


40 launchable systems

The RetroPie layer stands at 40 launchable systems. Every core runs as a capability-isolated EL0 process — ROM and disk images are loaded with size-capped SECURE capability tokens. The host OS and every other process are structurally unreachable from inside a running emulator core.